Network-on-Chip Application Mapping based on Domain Knowledge Genetic Algorithm

This paper addresses application mapping technique targeted for large-scale Network-on-chip (NoC). The increasing number of intellectual property (IP) cores in multi-processor System-on-Chips (MPSoCs) makes NoC application mapping more challenging to find optimum core-to-topology mapping. The factorial increase in possible mappings space requires a mapping algorithm to efficiently look for potential mapping space. This paper proposes an application mapping technique that incorporates domain knowledge into genetic algorithm (GA) to minimize the energy consumption of NoC communication. The GA is initialized with knowledge on network partition whereas the genetic crossover operator is guided with communication demands. The effects of domain knowledge GA on initial population and genetic operator are analysed in terms of the solution quality and convergence speed. Through simulation results on the MCSL real application traffic traces, the knowledge-based genetic operator gives 28% energy saving compared to application mapping using conventional GA. By combining both domain knowledge technique into GA, the solution quality can further save energy by 5% and convergence speed by 86% compared to knowledge-based crossover GA. Our experiment suggests that domain knowledge in GA initialization and crossover operation obtain low energy application mapping effectively for large-scale NoC-based MPSoC .